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http://www.dspace.espol.edu.ec/handle/123456789/9098
Title: | Simulación e implementación en fpga de un esquema de codificación del canal sujeto al estándar de wimax |
Authors: | Marzo Icaza, José Andrés Estrada, Rebeca |
Keywords: | WIMAX FEC CODIFICADOR DE CANAL FPGA SYSTEM GENERATOR. |
Issue Date: | 3-Mar-2010 |
Abstract: | This paper describes the design, simulation and implementation on a FPGA of a channel encoder for Wimax, focusing on the IEEE 802.16-2004 standard which represents the fixed implementation and it is part of research in the field of fixed wireless access networks Broadband without line of sight. The paper presents the main features used in Wimax for transmitting and receiving also the operation of each of the blocks used for error correction. This project presents an implementation using FPGA-based design model, using the System Generator software with Matlab and Simulink, to obtain data that allow us to verify the operation of the proposed design according to the WiMAX standard specifications and also analyze the ability for error correcting using BER vs. SNR curves and constellations to the channel output to justify the use of the system design. |
URI: | http://www.dspace.espol.edu.ec/handle/123456789/9098 |
Appears in Collections: | Artículos de Tesis de Grado - FIEC |
Files in This Item:
File | Description | Size | Format | |
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Simulación e Implementación en FPGA de un esquema de codificacion del Canal.pdf | 558.28 kB | Adobe PDF | View/Open |
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